Semiconductor device with multiple stress structures and method of forming the same

Abstract

A method of fabricating and a semiconductor device with multiple dislocation structures is disclosed. The exemplary semiconductor device includes gate structure overlying a top surface of a semiconductor substrate and a first gate spacer disposed on a sidewall of the gate structure and overlying the top surface of the substrate. The semiconductor device further includes a crystallized semiconductor material overlying the top surface of the semiconductor substrate and adjacent to a sidewall of the first gate spacer. The semiconductor device further includes a second gate spacer disposed on the sidewall of the first gate spacer and overlying the crystallized semiconductor material. The semiconductor device further includes a first stressor region disposed in the semiconductor substrate and a second stressor region disposed in the semiconductor substrate and in the crystallized semiconductor material.