The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2014
Filed:
Jan. 18, 2013
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Jum-Yong Park, Icheon-si, KR;
Jong-Han Shin, Gyeonggi-do, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/3205 (2006.01); H01L 21/8242 (2006.01); H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 27/108 (2006.01); H01L 27/105 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28017 (2013.01); H01L 29/4236 (2013.01); H01L 27/10876 (2013.01); H01L 27/10897 (2013.01); H01L 27/10823 (2013.01); H01L 27/105 (2013.01); H01L 27/10894 (2013.01);
Abstract
A method for fabricating a semiconductor device is provided, the method includes forming a plug conductive layer over an entire surface of a substrate, etching the plug conductive layer to form landing plugs, etching the substrate between the landing plugs to form a trench, forming a gate insulation layer over a surface of the trench and forming a buried gate partially filling the trench over the gate insulation layer.