The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2014

Filed:

May. 25, 2011
Applicants:

Lei Luo, Durham, NC (US);

Brian S. Leibowitz, San Francisco, CA (US);

Jared L. Zerbe, Woodside, CA (US);

Barry W. Daly, Chapel Hill, NC (US);

Wayne D. Dettloff, Cary, NC (US);

John C. Eble, Iii, Chapel Hill, NC (US);

John Wilson, Raleigh, NC (US);

Inventors:

Lei Luo, Durham, NC (US);

Brian S. Leibowitz, San Francisco, CA (US);

Jared L. Zerbe, Woodside, CA (US);

Barry W. Daly, Chapel Hill, NC (US);

Wayne D. Dettloff, Cary, NC (US);

John C. Eble, III, Chapel Hill, NC (US);

John Wilson, Raleigh, NC (US);

Assignee:

Rambus Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 3/00 (2006.01); H04L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A receiver circuit to receive signals from first and second pairs of transmission lines includes first and second interfaces, each with first and second input nodes to receive respective signals. The receiver circuit also includes a resistor network with first, second, third, and fourth resistive elements. The first and second resistive elements are each connected between the input nodes of a respective interface. The third and fourth resistive elements each include a pair of resistors connected in series between the input nodes of a respective interface, and an intermediate node between the resistors. The intermediate nodes are connected to an AC ground. The receiver circuit further includes a differential amplifier with first and second inputs coupled respectively to the first and second interfaces and an output to provide a signal derived from common mode components of the signals received at the input nodes.


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