The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2014

Filed:

May. 28, 2013
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Jingbo Gao, San Jose, CA (US);

Tsair-Chin Lin, Saratoga, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 11/26 (2006.01);
U.S. Cl.
CPC ...
G06F 11/261 (2013.01); G06F 17/5022 (2013.01); G06F 17/5027 (2013.01);
Abstract

The present patent document relates a method and apparatus for compressing probe system data in hardware functional verification systems used to verify user logic designs. Such systems can create large amounts of data every data cycle, which can include many bits that do not toggle from one cycle to the next. Compressing such data is possible by arranging the data in bytes and determining which bytes contain bits that have changed. A status byte may be generated that conveys which bytes contain changed bits. Together the status byte and only the bytes that contain changed bits are transmitted to a host workstation, saving bandwidth on the communication interface.


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