The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2014

Filed:

Apr. 13, 2009
Applicants:

Taranjit Singh Kukal, Delhi, IN;

Nikhil Gupta, New Delhi, IN;

Steve Durrill, Campbell, CA (US);

Vikrant Khanna, Noida, IN;

Dingru Xiao, Shanghai, CN;

Inventors:

Taranjit Singh Kukal, Delhi, IN;

Nikhil Gupta, New Delhi, IN;

Steve Durrill, Campbell, CA (US);

Vikrant Khanna, Noida, IN;

Dingru Xiao, Shanghai, CN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/04 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A design system provides data structures to store parameters of physical structures that can be viewed and modified in a front-end process through a logical design interface. In this way, system behavior defined by component structure can be evaluated and modified through a schematic representation of the data, regardless of a state of data representing the physical layout of interconnected physical structures. In electric circuit applications, for example, high frequency circuits can be incrementally designed and evaluated through structural parameters defined in a schematic diagram data abstraction without modifying and evaluating a layout data abstraction of the circuit directly.


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