The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 2014
Filed:
Jan. 05, 2012
Applicants:
Chia-chu Liu, Shin-chu, TW;
Kuei Shun Chen, Hsinchu, TW;
Inventors:
Chia-Chu Liu, Shin-chu, TW;
Kuei Shun Chen, Hsinchu, TW;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method and system check a double patterning layout in abutting cells and switch the pattern in one of the cells if the edge patterns in each cell are in the same mask. The method includes receiving layout data having patterns in abutting cells, changing a designated mask in one cell if the edge patterns are in the same mask, adjusting cell edge spacings at a shared edge according to a minimum spacing rule and a G1-rule, and outputting a presentation of the layout data.
Quick Actions:
Liu, Chia-Chu. (2014). System and method of circuit layout for multiple cells (U.S. Patent No. 8732626). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8732626
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile