The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2014

Filed:

Nov. 21, 2008
Applicants:

Roger Dwain Isaac, Campbell, CA (US);

Seiji Miura, Tokyo, JP;

Inventors:

Roger Dwain Isaac, Campbell, CA (US);

Seiji Miura, Tokyo, JP;

Assignee:

Spansion LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A storage system and method for storing information in memory nodes. The storage or memory nodes include a communication buffer. Flow of information to the storage nodes is controlled based upon constraints on the communication buffer. In one embodiment, communications between a master controller and a storage node have a determined maximum latency.


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Isaac, Roger. (2014). System and method for accessing memory (U.S. Patent No. 8732360). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8732360

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