The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 2014

Filed:

Apr. 02, 2012
Applicants:

Deepak Kamalanathan, Santa Clara, CA (US);

Juan Pablo Saenz Echeverry, Mountain View, CA (US);

Venkatesh P. Gopinath, Fremont, CA (US);

Inventors:

Deepak Kamalanathan, Santa Clara, CA (US);

Juan Pablo Saenz Echeverry, Mountain View, CA (US);

Venkatesh P. Gopinath, Fremont, CA (US);

Assignee:

Adesto Technologies Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device can include a load circuit coupled in series with at least one memory element between two nodes and configured to enable a programming current to flow through the memory element to lower its impedance, and configured to enable an erase current to flow through the element in a direction opposite to the program current, the erase current varying in response to an erase voltage applied across the two nodes as the memory element impedance increases.


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