Balanced performance for on-chip folding of non-volatile memories

Abstract

A non-volatile memory system receives and stores host data. As the memory system receives host data, it initially writes the data in a binary format and then subsequently performs an on-chip folding operation on the data, storing the data in a multi-state format. The memory system interleaves the phases of the folding operations, where the host stores data according to allocation units. The memory system also can perform the binary and subsequent on-chip folding operations on multiple memory planes in parallel, where the controller also balances the operations. When the memory system needs a memory block for the writing of data, it selects blocks from a free block list, where the free block list includes a reserve portion that is only accessible for a specified set of commands.