The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 2014
Filed:
Nov. 29, 2011
Structure for high-speed signal integrity in semiconductor package with single-metal-layer substrate
Gregory E. Howard, Plano, TX (US);
Matthew D. Romig, Richardson, TX (US);
Marie-solange Anne Milleron, Richardson, TX (US);
Souvik Mukherjee, Plano, TX (US);
Gregory E. Howard, Plano, TX (US);
Matthew D. Romig, Richardson, TX (US);
Marie-Solange Anne Milleron, Richardson, TX (US);
Souvik Mukherjee, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A semiconductor chip () with bond pads () on a substrate () with rows and columns of regularly pitched metal contact pads (). A zone comprises a first pair () and a parallel second pair () of contact pads, and a single contact pad () for ground potential; staggered pairs of stitch pads () connected to respective pairs of adjacent contact pads by parallel and equal-length traces (, etc.). Parallel and equal-length bonding wires (, etc.) connect bond pad pairs to stitch pad pairs, forming differential pairs of parallel and equal-length conductor lines. Two differential pairs in parallel and symmetrical position form a transmitter/receiver cell for conducting high-frequency signals.