The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8723276 B1

PDF
Full Text
Expired
Date of Patent:
May. 13, 2014

Filed:

Oct. 05, 2010
Applicants:

Boris Binder, Dresden, DE;

Bernd Foeste, Dresden, DE;

Thoralf Kautzsch, Dresden, DE;

Stefan Kolb, Unterschleisshelm, DE;

Marco Mueller, Pirna, DE;

Inventors:

Boris Binder, Dresden, DE;

Bernd Foeste, Dresden, DE;

Thoralf Kautzsch, Dresden, DE;

Stefan Kolb, Unterschleisshelm, DE;

Marco Mueller, Pirna, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a semiconductor structure includes etching a first opening into a substrate; etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench; fabricating a sense element for sensing a deflection of the lamella; and singulating the semiconductor structure at the chip singulation trench.


Find Patent Forward Citations

Binder, Boris. (2014). Semiconductor structure with lamella defined by singulation trench (U.S. Patent No. 8723276). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8723276

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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