The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2014

Filed:

Jul. 20, 2012
Applicant:

Xiaojun Wang, Cary, NC (US);

Inventor:

Xiaojun Wang, Cary, NC (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Some embodiments of the invention provide a method for automatically, accurately, and efficiently identifying double patterning (DP) loop violations in an IC design layout. The method of some embodiments identifies DP loop violations in a manner that eliminates false identification of DP loop violations without missing DP loop violations that should be identified. The method of some embodiments also generates a marker for each identified DP loop violation to indicate that a set of shapes associated with the marker forms the DP loop and displays the marker in the design layout.


Find Patent Forward Citations

Wang, Xiaojun. (2014). Method and apparatus for identifying double patterning loop violations (U.S. Patent No. 8719737). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8719737

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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