The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 06, 2014

Filed:

Oct. 16, 2012
Applicants:

Seung Ki Joo, Seongnam-si, KR;

Chang Woo Byun, Seoul, KR;

SE Wan Son, Yongin-si, KR;

Yong Woo Lee, Seoul, KR;

Hyun MO Kang, Incheon, KR;

Seol Ah Park, Seoul, KR;

Woo Chang Lim, Seoul, KR;

Tao LI, Seoul, KR;

Seung Jae Yun, Seoul, KR;

Sang Joo Lee, Seoul, KR;

Inventors:

Seung Ki Joo, Seongnam-si, KR;

Chang Woo Byun, Seoul, KR;

Se Wan Son, Yongin-si, KR;

Yong Woo Lee, Seoul, KR;

Hyun Mo Kang, Incheon, KR;

Seol Ah Park, Seoul, KR;

Woo Chang Lim, Seoul, KR;

Tao Li, Seoul, KR;

Seung Jae Yun, Seoul, KR;

Sang Joo Lee, Seoul, KR;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a method of crystallizing an amorphous silicon thin film transistor and a method of fabricating a polycrystalline thin film transistor using the same, in which the polycrystalline thin film transistor indicating leakage current characteristics of a level that is applicable for active matrix organic light emitting diode displays (AMOLEDs) can be manufactured by using a silicide seed induced lateral crystallization (SILC) method. The amorphous silicon thin film transistor crystallizing method includes the steps of: forming an amorphous silicon layer on a substrate; forming an active region by patterning the amorphous silicon layer; forming a crystallization induced metal layer in both a source region and a drain region that are placed on both side ends of the active region; forming a number of dot-shaped metal silicide seeds on the surfaces of the source region and the drain region made of amorphous silicon by removing the crystallization induced metal layer; and crystallizing the active region formed of the amorphous silicon layer by heat-treating the substrate by using the metal silicide seeds as crystallization seeds.


Find Patent Forward Citations

Loading…