The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2014
Filed:
Jan. 14, 2011
Applicants:
Tao Feng, Santa Clara, CA (US);
François Hébert, San Mateo, CA (US);
Ming Sun, Sunnyvale, CA (US);
Yueh-se Ho, Sunnyvale, CA (US);
Inventors:
Tao Feng, Santa Clara, CA (US);
François Hébert, San Mateo, CA (US);
Ming Sun, Sunnyvale, CA (US);
Yueh-Se Ho, Sunnyvale, CA (US);
Assignee:
Alpha & Omega Semiconductor Ltd, Hamilton, BM;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
Power wafer level chip scale package (CSP) and process of manufacture are enclosed. The power wafer level chip scale package includes all source, gate and drain electrodes located on one side of the device, which is convenient for mounting to a printed circuit board (PCB) with solder paste.