The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2014
Filed:
Apr. 10, 2012
Tong Chen, Yorktown Heights, NY (US);
Brian Flachs, Georgetown, TX (US);
Brad W. Michael, Cedar Park, TX (US);
Mark R. Nutter, Austin, TX (US);
John K. P. O'brien, South Salem, NY (US);
Kathryn M. O'brien, South Salem, NY (US);
Tao Zhang, Jersey City, NJ (US);
Tong Chen, Yorktown Heights, NY (US);
Brian Flachs, Georgetown, TX (US);
Brad W. Michael, Cedar Park, TX (US);
Mark R. Nutter, Austin, TX (US);
John K. P. O'Brien, South Salem, NY (US);
Kathryn M. O'Brien, South Salem, NY (US);
Tao Zhang, Jersey City, NJ (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Mechanisms are provided for rewriting branch instructions in a portion of code. The mechanisms receive a portion of source code having an original branch instruction. The mechanisms generate a branch stub for the original branch instruction. The branch stub stores information about the original branch instruction including an original target address of the original branch instruction. Moreover, the mechanisms rewrite the original branch instruction so that a target of the rewritten branch instruction references the branch stub. In addition, the mechanisms output compiled code including the rewritten branch instruction and the branch stub for execution by a computing device. The branch stub is utilized by the computing device at runtime to determine if execution of the rewritten branch instruction can be redirected directly to a target instruction corresponding to the original target address in an instruction cache of the computing device without intervention by an instruction cache runtime system.