The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2014
Filed:
Feb. 12, 2013
Freescale Semiconductor, Inc., Austin, TX (US);
Anis M. Jarrar, Austin, TX (US);
Stefano Pietri, Austin, TX (US);
Steven K. Watkins, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
An integrated circuit including a substrate, multiple devices, and voltage control devices. The devices may include high threshold, low threshold, and standard threshold voltage devices. The devices and the voltage control devices are distributed across and coupled to the same substrate. Each voltage control device is configured to apply a back bias voltage at one of multiple discrete offset voltage levels. At least one voltage control device applies a first offset voltage level for back biasing high threshold voltage devices and at least one voltage control device applies a second offset voltage level for back biasing low threshold voltage devices. The selection of back biasing is based on relative population density of the different types of devices and varies across the substrate. Fine grain reverse back biasing reduces leakage current while reducing any performance decrease. Fine grain forward back biasing improves performance while reducing any leakage current increase.