The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2014
Filed:
Jun. 05, 2012
Sang-jine Park, Yongin-si, KR;
Kee-sang Kwon, Seoul, KE;
Doo-sung Yun, Suwon-si, KR;
Bo-un Yoon, Seoul, KR;
Il-young Yoon, Hwaseong-si, KR;
Jeong-nam Han, Seoul, KR;
Sang-Jine Park, Yongin-si, KR;
Kee-Sang Kwon, Seoul, KE;
Doo-Sung Yun, Suwon-si, KR;
Bo-Un Yoon, Seoul, KR;
Il-Young Yoon, Hwaseong-si, KR;
Jeong-Nam Han, Seoul, KR;
Abstract
In a method for fabricating a semiconductor device, a substrate is provided including an interlayer dielectric layer and first and second hard mask patterns sequentially stacked thereon. A first trench is provided in the interlayer dielectric layer through the second hard mask pattern and the first hard mask pattern. A filler material is provided on the interlayer dielectric layer and the second hard mask pattern to fill the first trench. An upper portion of the second hard mask pattern is exposed by partially removing the filler material. The second hard mask pattern is removed, and remaining filler material is removed from the first trench. A wiring is formed by filling the first trench with a conductive material.