The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 29, 2014
Filed:
Dec. 08, 2011
Zvi Or-bach, San Jose, CA (US);
Deepak C. Sekar, San Jose, CA (US);
Brian Cronquist, San Jose, CA (US);
Israel Beinglass, Sunnyvale, CA (US);
Jan Lodewijk DE Jong, Cupertino, CA (US);
Zvi Or-Bach, San Jose, CA (US);
Deepak C. Sekar, San Jose, CA (US);
Brian Cronquist, San Jose, CA (US);
Israel Beinglass, Sunnyvale, CA (US);
Jan Lodewijk de Jong, Cupertino, CA (US);
Monolithic 3D Inc, San Jose, CA (US);
Abstract
A method of manufacturing semiconductor devices: providing a first device including a first die and second die, where the first die is diced from a first wafer, the second die is diced from a second wafer, the first die is connected to the second die using at least one through-silicon-via; providing a second device including a third die and fourth die, where the third die is diced from a third wafer, the fourth die is diced from a fourth wafer, the third die is connected to the fourth die using at least one through-silicon-via; where the first die includes a first functionality and the third die includes a second functionality, the first functionality is different than the second functionality, a majority of the masks used for processing the first wafer and the third wafer are the same; and the second die size is substantially different than the fourth die size.