The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2014

Filed:

Dec. 05, 2011
Applicants:

Sathappan Palaniappan, Bangalore, IN;

Dharmesh Kishor Tirthdasani, Bangalore, IN;

Romeshkumar Bharatkumar Mehta, Maharashtra, IN;

Inventors:

Sathappan Palaniappan, Bangalore, IN;

Dharmesh Kishor Tirthdasani, Bangalore, IN;

Romeshkumar Bharatkumar Mehta, Maharashtra, IN;

Assignee:

LSI Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); G06F 13/14 (2006.01);
U.S. Cl.
CPC ...
G06F 11/10 (2013.01); G06F 13/14 (2013.01);
Abstract

An interface device to interface a processing device and a memory device includes an error correcting code (ECC) encoder to calculate ECC bit(s) and to provide the ECC bit(s) to the processing device based at least in part on data provided by the memory device, thereby eliminating a need to store the ECC bits in the memory device. The interface device may include a parity encoder to provide parity bit(s) to the memory device as a function of data provided by the processing device, and a parity decoder to selectively modify the ECC bit(s) as a function of the data and parity bit(s) provided by the memory device. The ECC encoder may provide ECC bits, and the parity decoder may selectively modify the ECC bits provided to the processing device based on data provided by the memory device and parity bit(s) provided by the memory device.


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