The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 22, 2014
Filed:
Nov. 17, 2011
Hak-lay Chuang, Singapore, SG;
Cheng-cheng Kuo, Baoshan Township, Hsinchu County, TW;
Ching-che Tsai, Hsinchu, TW;
Ming Zhu, Singapore, SG;
Bao-ru Young, Hsinchu, TW;
Hak-Lay Chuang, Singapore, SG;
Cheng-Cheng Kuo, Baoshan Township, Hsinchu County, TW;
Ching-Che Tsai, Hsinchu, TW;
Ming Zhu, Singapore, SG;
Bao-Ru Young, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a plurality of dummy gates over a substrate. The dummy gates extend along a first axis. The method includes forming a masking layer over the dummy gates. The masking layer defines an elongate opening extending along a second axis different from the first axis. The opening exposes first portions of the dummy gates and protects second portions of the dummy gates. A tip portion of the opening has a width greater than a width of a non-tip portion of the opening. The masking layer is formed using an optical proximity correction (OPC) process. The method includes replacing the first portions of the dummy gates with a plurality of first metal gates. The method includes replacing the second portions of the dummy gates with a plurality of second metal gates different from the first metal gates.