The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 2014

Filed:

Jan. 31, 2005
Applicants:

James Werking, Fishkill, NY (US);

Frank Feustel, Dresden, DE;

Christian Zistl, Dresden, DE;

Peter Huebler, Coswig, DE;

Inventors:

James Werking, Fishkill, NY (US);

Frank Feustel, Dresden, DE;

Christian Zistl, Dresden, DE;

Peter Huebler, Coswig, DE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

The introduction of dielectric material of enhanced mechanical stability, such as silicon dioxide or fluorine-doped silicon dioxide, into the via level of a low-k interconnect structure provides an increased overall mechanical stability, especially during the packaging of the device. Consequently, cracking and delamination, as frequently observed in high end low-k interconnect structures, may significantly be reduced, even if organic package substrates are used.


Find Patent Forward Citations

Werking, James. (2014). Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging (U.S. Patent No. 8698312). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8698312

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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