The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 2014

Filed:

Jul. 26, 2012
Applicant:

Tatsunori Murata, Kanagawa, JP;

Inventor:

Tatsunori Murata, Kanagawa, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

An n-channel MISFETQn is formed in an nMIS first formation region of a semiconductor substrate and a p-channel MISFETQp is formed in an adjacent pMIS second formation region of the semiconductor substrate. A silicon nitride film having a tensile stress is formed to cover the n-channel MISFETQn and the p-channel MISFETQp. In one embodiment, the silicon nitride film in the nMIS formation region and the pMIS formation region is irradiated with ultraviolet rays. Thereafter, a mask layer is formed to cover the silicon nitride film in the nMIS formation region and to expose the silicon nitride film in the pMIS formation region. The silicon nitride film in the pMIS formation region is then subjected to plasma processing, which relieves the tensile stress of the silicon nitride film in the pMIS formation region.


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