The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2014

Filed:

Aug. 04, 2011
Applicants:

Ramakrishnan Venkatasubramanian, Plano, TX (US);

Sumant Kale, Allen, TX (US);

Abhijeet Ashok Chachad, Plano, TX (US);

Inventors:

Ramakrishnan Venkatasubramanian, Plano, TX (US);

Sumant Kale, Allen, TX (US);

Abhijeet Ashok Chachad, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

In an embodiment of the invention, a pipelined memory bank is tested by scanning test patterns into an integrated circuit. Test data is formed from the test patterns and shifted into a scan-in chain in the pipelined memory bank. The test data in the scan-in chain is launched into the inputs of the pipelined memory bank during a first clock cycle. Data from the outputs of the pipelined memory bank is captured in a scan-out chain during a second cycle where the time between the first and second clock cycles is equal to or greater than the read latency of the memory bank.


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