The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2014

Filed:

Feb. 09, 2009
Applicants:

Youseok Suh, Cupertino, CA (US);

Sung-yong Chung, Davis, CA (US);

Ya-fen Lin, Saratoga, CA (US);

Yi-ching Wu, San Jose, CA (US);

Inventors:

YouSeok Suh, Cupertino, CA (US);

Sung-Yong Chung, Davis, CA (US);

Ya-Fen Lin, Saratoga, CA (US);

Yi-Ching Wu, San Jose, CA (US);

Assignee:

Spansion LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and structures for forming semiconductor channels based on gate fringing effect are disclosed. In one embodiment, a NAND flash memory device comprises multiple NAND strings of memory transistors. Each memory transistor includes a charge trapping layer and a gate electrode formed on the charge trapping layer. The memory transistors are formed close to each other to form a channel between an adjacent pair of the memory transistors based on a gate fringing effect associated with the adjacent pair of the memory transistors.


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