The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 2014
Filed:
Nov. 07, 2011
Sang-jin Kim, Suwon-si, KR;
Jong-chan Shin, Seongnam-si, KR;
Yong-kug Bae, Hwaseong-si, KR;
Do-hyoung Kim, Hwaseong-si, KR;
Dong-woon Park, Seoul, KR;
Sang-Jin Kim, Suwon-si, KR;
Jong-Chan Shin, Seongnam-si, KR;
Yong-Kug Bae, Hwaseong-si, KR;
Do-Hyoung Kim, Hwaseong-si, KR;
Dong-Woon Park, Seoul, KR;
SAMSUNG Electronics Co., Ltd., Suwon-si, KR;
Abstract
In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.