The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2014

Filed:

Sep. 21, 2011
Applicants:

Jung-chan Lee, Suwon-si, KR;

Seung-jae Lee, Hwaseong-si, KR;

Yu-gyun Shin, Seongnam-si, KR;

Dae-young Kwak, Seongnam-si, KR;

Byung-suk Jung, Seoul, KR;

Inventors:

Jung-Chan Lee, Suwon-si, KR;

Seung-Jae Lee, Hwaseong-si, KR;

Yu-Gyun Shin, Seongnam-si, KR;

Dae-Young Kwak, Seongnam-si, KR;

Byung-Suk Jung, Seoul, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a semiconductor device includes forming gate structures on PMOS and NMOS transistor regions of the semiconductor substrate, forming epitaxial blocking layers on source/drain regions of PMOS and NMOS transistor regions using a nitridation process, then selectively removing one of the epitaxial blocking layers, and using a SEG process to form an epitaxial layer on respective source/drain regions while shielding the other source/drain regions with a remaining epitaxial blocking layer.


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