The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2014
Filed:
Apr. 30, 2012
Applicants:
Mehdi Asnaashari, Danville, CA (US);
William E. Benson, San Mateo, CA (US);
Inventors:
Mehdi Asnaashari, Danville, CA (US);
William E. Benson, San Mateo, CA (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2006.01);
U.S. Cl.
CPC ...
Abstract
The present disclosure includes methods, devices, and systems for a logical address offset. One method embodiment includes detecting a memory unit formatting operation. Subsequently, in response to detecting the formatting operation, the method includes inspecting format information on the memory unit, calculating a logical address offset, and applying the offset to a host logical address.
Asnaashari, Mehdi. (2014). Logical address offset in response to detecting a memory formatting operation (U.S. Patent No. 8683173). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8683173
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile