The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2014

Filed:

Mar. 15, 2013
Applicants:

Don Van Dyke, Rescue, CA (US);

Michael Mishaeli, Zichron Yaakov, IL;

Ittai Anati, Haifa, IL;

Baiju V. Patel, Portland, OR (US);

Will Deutsch, Folsom, CA (US);

Rajesh R. Sha, Portland, OR (US);

Gilbert Neiger, Hillsboro, OR (US);

James B. Crossland, Banks, OR (US);

Chris J. Newburn, South Beloit, IL (US);

Bryant E. Bigbee, Scottsdale, AZ (US);

Muhammad Faisal Azeem, Hillsboro, OR (US);

John L. Reid, Portland, OR (US);

Dion Rodgers, Hillsboro, OR (US);

Inventors:

Don Van Dyke, Rescue, CA (US);

Michael Mishaeli, Zichron Yaakov, IL;

Ittai Anati, Haifa, IL;

Baiju V. Patel, Portland, OR (US);

Will Deutsch, Folsom, CA (US);

Rajesh R. Sha, Portland, OR (US);

Gilbert Neiger, Hillsboro, OR (US);

James B. Crossland, Banks, OR (US);

Chris J. Newburn, South Beloit, IL (US);

Bryant E. Bigbee, Scottsdale, AZ (US);

Muhammad Faisal Azeem, Hillsboro, OR (US);

John L. Reid, Portland, OR (US);

Dion Rodgers, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

Embodiments of an invention related to context state management based on processor features are disclosed. In one embodiment, a processor includes instruction logic and state management logic. The instruction logic is to receive a state management instruction having a parameter to identify a subset of the features supported by the processor. The state management logic is to perform a state management operation specified by the state management instruction.


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