The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2014

Filed:

Mar. 07, 2012
Applicants:

Derick G. Behrends, Rochester, MN (US);

Todd A. Christensen, Rochester, MN (US);

Travis R. Hebig, Rochester, MN (US);

Michael Launsbach, Rochester, MN (US);

Daniel M. Nelson, Rochester, MN (US);

Inventors:

Derick G. Behrends, Rochester, MN (US);

Todd A. Christensen, Rochester, MN (US);

Travis R. Hebig, Rochester, MN (US);

Michael Launsbach, Rochester, MN (US);

Daniel M. Nelson, Rochester, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and circuit for implementing delay correction in static random access memory (SRAM), and a design structure on which the subject circuit resides are provided. The SRAM circuit includes a precharge enable signal coupled between precharge near and precharge far signals and wordline near and wordline far signals of the SRAM. A precharge pull down device is coupled between the precharge far signal and ground and is controlled responsive to the precharge enable signal to decrease a time delay of the falling transition of the precharge far signal. A respective word line pull up device is coupled between a respective wordline far signal and a voltage supply rail and is controlled responsive to the precharge enable signal to increase wordline voltage level upon a rising transition of the wordline far signal.


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