The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2014
Filed:
Apr. 10, 2012
Chih-neng Hsu, Zhutian Township, Pingtung County, TW;
I-liang Ling, Zhubei, TW;
Qi Guo, FuJian, CN;
Synopsys Taiwan Co., Ltd., Hsinchu Hsien, TW;
Synopsys, Inc., Mountain View, CA (US);
Abstract
Methods and systems for viewing and debugging HDL designs having SystemVerilog interface constructs are provided. An HDL design code is received, wherein the design code comprises a first module, a second module and a SystemVerilog interface construct. A first object corresponding to the first module, a second object corresponding to the second module and an interface object corresponding to the interface construct are displayed in a schematic view. The interface object is disposed between the first and second objects, and a shape of the interface object is different from that of the first and second objects. The interface signals from the first object to the second object and the interface signals from the second object to the first object pass through the interface object.