The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2014
Filed:
Sep. 11, 2012
Chi-shun Lin, Fremont, CA (US);
Seow-fong Lim, Fremont, CA (US);
Ming-huei Shieh, Cupertino, CA (US);
Chi-Shun Lin, Fremont, CA (US);
Seow-Fong Lim, Fremont, CA (US);
Ming-Huei Shieh, Cupertino, CA (US);
Winbond Electronics Corp., Taichung, TW;
Abstract
The present invention discloses a reference cell circuit which is applied to a non-volatile memory. The reference cell circuit includes a reference cell array, a first current mirror circuit, and a second current mirror circuit. The reference cell array includes at least one row of floating gate transistors. The first current mirror circuit is arranged to generate a mirror current according to a reference current generated by the reference cell array. The second current mirror circuit is arranged to receive the mirror current and generate an adjusted reference current according to the mirror current and a selected one of a plurality of enable signals, wherein the plurality of enable signals correspond to a plurality operations of the non-volatile memory and the adjusted reference current is arranged to determine logical state of a plurality of memory cells of the non-volatile memory.