The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8659937 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 25, 2014

Filed:

Feb. 08, 2012
Applicants:

Chad A. Adams, Byron, MN (US);

Sharon H. Cesky, Rochester, MN (US);

Elizabeth L. Gerhard, Rochester, MN (US);

Jeffrey M. Scherer, Rochester, MN (US);

Inventors:

Chad A. Adams, Byron, MN (US);

Sharon H. Cesky, Rochester, MN (US);

Elizabeth L. Gerhard, Rochester, MN (US);

Jeffrey M. Scherer, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 7/00 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and circuit for implementing low power write disabled local evaluation for Static Random Access Memory (SRAM), and a design structure on which the subject circuit resides are provided. The circuit includes a write disable function to prevent discharge of a global bit line during a write operation. The write disable function disables a NAND gate driving a global pull down device during the write operation preventing the global pull down device from discharging the global bit line.


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Adams, Chad. (2014). Implementing low power write disabled local evaluation for sram (U.S. Patent No. 8659937). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8659937

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