The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2014

Filed:

Jul. 05, 2011
Applicants:

Masahiro Moniwa, Sayama, JP;

Hiraku Chakihara, Akishima, JP;

Kousuke Okuyama, Kawagoe, JP;

Yasuhiko Takahashi, Higashiyamato, JP;

Inventors:

Masahiro Moniwa, Sayama, JP;

Hiraku Chakihara, Akishima, JP;

Kousuke Okuyama, Kawagoe, JP;

Yasuhiko Takahashi, Higashiyamato, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 21/337 (2006.01); H01L 21/8244 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory cell of an SRAM has two drive MISFETs and two vertical MISFETs. The p channel vertical MISFETs are formed above the n channel drive MISFETs. The vertical MISFETs respectively mainly include a laminate formed of a lower semiconductor layer, intermediate semiconductor layer and upper semiconductor layer laminated in this sequence, a gate insulating film of silicon oxide formed on the surface of the side wall of the laminate, and a gate electrode formed so as to cover the side wall of the laminate. The vertical MISFETs are perfect depletion type MISFETs.


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