The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2014

Filed:

Oct. 31, 2011
Applicants:

Toshifumi Watanabe, Yokohama, JP;

Hidetoshi Saito, Yamato, JP;

Inventors:

Toshifumi Watanabe, Yokohama, JP;

Hidetoshi Saito, Yamato, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one embodiment, an interface includes first to third input circuits, delay and selection circuits. The first input circuit outputs an active first internal signal in response to an active first control signal received by a memory device. The second input circuit outputs an active second internal signal in response to an active second control signal received by the device while the device is receiving the active first control signal. The delay circuit outputs a selection signal in first or second states after the elapse of a first period from inactivation or activation of the first control signal. The selection circuit outputs the first and second internal signals as an enable signal while receiving the selection signal of the first and second states. The third input circuit outputs an input signal received from the outside from the interface to inside the device while receiving the active enable signal.


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