The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2014

Filed:

Mar. 07, 2012
Applicants:

Masayuki Kitamura, Yokohama, JP;

Makoto Wada, Yokohama, JP;

Yuichi Yamazaki, Inagi, JP;

Masayuki Katagiri, Kawasaki, JP;

Atsuko Sakata, Yokohama, JP;

Akihiro Kajita, Yokohama, JP;

Tadashi Sakai, Yokohama, JP;

Naoshi Sakuma, Yokohama, JP;

Ichiro Mizushima, Yokohama, JP;

Inventors:

Masayuki Kitamura, Yokohama, JP;

Makoto Wada, Yokohama, JP;

Yuichi Yamazaki, Inagi, JP;

Masayuki Katagiri, Kawasaki, JP;

Atsuko Sakata, Yokohama, JP;

Akihiro Kajita, Yokohama, JP;

Tadashi Sakai, Yokohama, JP;

Naoshi Sakuma, Yokohama, JP;

Ichiro Mizushima, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one embodiment, a semiconductor device is disclosed. The device includes a semiconductor substrate, and an interconnection above the semiconductor substrate. The interconnection includes a co-catalyst layer, a catalyst layer on the co-catalyst layer, and a graphene layer on the catalyst layer. The co-catalyst layer includes a portion contacting the catalyst layer. The portion has a face-centered cubic structure with a (111) plane oriented parallel to a surface of the semiconductor substrate. The catalyst layer has a face-centered cubic structure with a (111) plane oriented parallel to the surface of the semiconductor substrate.


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