The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2014
Filed:
Aug. 30, 2011
Po-cheng Huang, Chiayi, TW;
Teng-chun Tsai, Tainan, TW;
Chia-lin Hsu, Tainan, TW;
Chun-wei Hsu, Taipei, TW;
Yen-ming Chen, New Taipei, TW;
Chih-hsun Lin, Ping-Tung County, TW;
Chang-hung Kung, Kaohsiung, TW;
Po-Cheng Huang, Chiayi, TW;
Teng-Chun Tsai, Tainan, TW;
Chia-Lin Hsu, Tainan, TW;
Chun-Wei Hsu, Taipei, TW;
Yen-Ming Chen, New Taipei, TW;
Chih-Hsun Lin, Ping-Tung County, TW;
Chang-Hung Kung, Kaohsiung, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A semiconductor process includes the following steps. A first gate structure and a second gate structure are formed on a substrate, wherein the top of the first gate structure includes a cap layer, so that the vertical height of the first gate structure is higher than the vertical height of the second gate structure. An interdielectric layer is formed on the substrate. A first chemical mechanical polishing process is performed to expose the top surface of the cap layer. A second chemical mechanical polishing process is performed to expose the top surface of the second gate structure or an etching process is performed to remove the interdielectric layer located on the second gate structure. A second chemical mechanical polishing process is then performed to remove the cap layer.