The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2014

Filed:

Jul. 16, 2007
Applicants:

Federico Giovanni Ziglioli, Milan, IT;

Giovanni Graziosi, Penne, IT;

Mark Andrew Shaw, Milan, IT;

Mario Francesco Cortese, Milan, IT;

Conrad Max Cachia, Tarxien, MT;

Inventors:

Federico Giovanni Ziglioli, Milan, IT;

Giovanni Graziosi, Penne, IT;

Mark Andrew Shaw, Milan, IT;

Mario Francesco Cortese, Milan, IT;

Conrad Max Cachia, Tarxien, MT;

Assignees:

STMicroelectrics S.r.l., Agrate Brianza, IT;

STMicroelectronics (Malta) Ltd., Kirkop, MT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor package substrate suitable for supporting a damage-sensitive device and a package substrate core having an upper and a lower surface. At least one pair of metal layers coats the upper and lower surfaces of the package substrate core. One pair of solder mask layers coats the outer metal layers of the at least one pair of metal layers. A plurality of vias is formed across the package substrate core and the at least one pair of metal layers. Advantageously, the plurality of vias is substantially distributed according to a homogeneous pattern in an area that is to be covered by the damage-sensitive device. A method for the production of such semiconductor package substrate is also described.


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