The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 14, 2014
Filed:
Dec. 26, 2009
Zhen Fang, Portland, OR (US);
Meenakshisundara R. Chinthamani, Hillsboro, OR (US);
LI Zhao, Beaverton, OR (US);
Milind B. Kamble, Austin, TX (US);
Ravishankar Iyer, Portland, OR (US);
Seung Eun Lee, Hillsboro, OR (US);
Robert S. Chappell, Portland, OR (US);
Ryan L. Carlson, Hillsboro, OR (US);
Zhen Fang, Portland, OR (US);
Meenakshisundara R. Chinthamani, Hillsboro, OR (US);
Li Zhao, Beaverton, OR (US);
Milind B. Kamble, Austin, TX (US);
Ravishankar Iyer, Portland, OR (US);
Seung Eun Lee, Hillsboro, OR (US);
Robert S. Chappell, Portland, OR (US);
Ryan L. Carlson, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods and apparatus to provide for power consumption reduction in memories (such as cache memories) are described. In one embodiment, a virtual tag is used to determine whether to access a cache way. The virtual tag access and comparison may be performed earlier in the read pipeline than the actual tag access or comparison. In another embodiment, a speculative way hit may be used based on pre-ECC partial tag match to wake up a subset of data arrays. Other embodiments are also described.