The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2014

Filed:

Apr. 23, 2010
Applicants:

Tzu-jin Yeh, Hsin-Chu, TW;

Kal-wen Tan, Taipei, TW;

Chewn-pu Jou, Hsin-Chu, TW;

Sally Liu, Hsin-Chu, TW;

Fu-lung Hsueh, Cranbury, NJ (US);

Inventors:

Tzu-Jin Yeh, Hsin-Chu, TW;

Kal-Wen Tan, Taipei, TW;

Chewn-Pu Jou, Hsin-Chu, TW;

Sally Liu, Hsin-Chu, TW;

Fu-Lung Hsueh, Cranbury, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

In accordance with an embodiment, a method for substrate noise analysis comprises using a first processor based system, creating and simulating a circuit schematic comprising a multi-terminal model of a transistor, and thereafter, creating a layout based on properties represented in the circuit schematic and simulation results of the simulating. The multi-terminal model comprises a source terminal, a gate terminal, a drain terminal, a body terminal, and a guard-ring terminal.


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