The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2014
Filed:
Apr. 10, 2012
Tong Chen, Yorktown Heights, NY (US);
Brian Flachs, Georgetown, TX (US);
Brad W. Michael, Cedar Park, TX (US);
Mark R. Nutter, Austin, TX (US);
John K. P. O'brien, South Salem, NY (US);
Kathryn M. O'brien, South Salem, NY (US);
Tao Zhang, Jersey City, NJ (US);
Tong Chen, Yorktown Heights, NY (US);
Brian Flachs, Georgetown, TX (US);
Brad W. Michael, Cedar Park, TX (US);
Mark R. Nutter, Austin, TX (US);
John K. P. O'Brien, South Salem, NY (US);
Kathryn M. O'Brien, South Salem, NY (US);
Tao Zhang, Jersey City, NJ (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Mechanisms are provided for dynamically rewriting branch instructions in a portion of code. The mechanisms execute a branch instruction in the portion of code. The mechanisms determine if a target instruction of the branch instruction, to which the branch instruction branches, is present in an instruction cache associated with the processor. Moreover, the mechanisms directly branch execution of the portion of code to the target instruction in the instruction cache, without intervention from an instruction cache runtime system, in response to a determination that the target instruction is present in the instruction cache. In addition, the mechanisms redirect execution of the portion of code to the instruction cache runtime system in response to a determination that the target instruction cannot be determined to be present in the instruction cache.