The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2014
Filed:
May. 05, 2011
Matthias A. Blumrich, Ridgefield, CT (US);
Paul W. Coteus, Yorktown Heights, NY (US);
Dong Chen, Croton on Hudson, NY (US);
Alan Gara, Mount Kisco, NY (US);
Mark E. Giampapa, Irvington, NY (US);
Philip Heidelberger, Cortlandt Manor, NY (US);
Dirk Hoenicke, Ossining, NY (US);
Todd E. Takken, Brewster, NY (US);
Burkhard D. Steinmacher-burow, Wenau, DE;
Pavlos M. Vranas, Bedford Hills, NY (US);
Matthias A. Blumrich, Ridgefield, CT (US);
Paul W. Coteus, Yorktown Heights, NY (US);
Dong Chen, Croton on Hudson, NY (US);
Alan Gara, Mount Kisco, NY (US);
Mark E. Giampapa, Irvington, NY (US);
Philip Heidelberger, Cortlandt Manor, NY (US);
Dirk Hoenicke, Ossining, NY (US);
Todd E. Takken, Brewster, NY (US);
Burkhard D. Steinmacher-Burow, Wenau, DE;
Pavlos M. Vranas, Bedford Hills, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for enabling high-speed, low-latency global collective communications among interconnected processing nodes. The global collective network optimally enables collective reduction operations to be performed during parallel algorithm operations executing in a computer structure having a plurality of the interconnected processing nodes. Router devices are included that interconnect the nodes of the network via links to facilitate performance of low-latency global processing operations at nodes of the virtual network. The global collective network may be configured to provide global barrier and interrupt functionality in asynchronous or synchronized manner. When implemented in a massively-parallel supercomputing structure, the global collective network is physically and logically partitionable according to needs of a processing algorithm.