The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2013
Filed:
Dec. 31, 2009
Shih-wei Liao, Palo Alto, CA (US);
Xinmin Tian, Union City, CA (US);
Gerolf F. Hoflehner, Santa Clara, CA (US);
Hong Wang, Santa Clara, CA (US);
Daniel M. Lavery, Santa Clara, CA (US);
Perry Wang, San Jose, CA (US);
Dongkeun Kim, San Jose, CA (US);
Milind Girkar, Sunnyvale, CA (US);
John P. Shen, San Jose, CA (US);
Shih-wei Liao, Palo Alto, CA (US);
Xinmin Tian, Union City, CA (US);
Gerolf F. Hoflehner, Santa Clara, CA (US);
Hong Wang, Santa Clara, CA (US);
Daniel M. Lavery, Santa Clara, CA (US);
Perry Wang, San Jose, CA (US);
Dongkeun Kim, San Jose, CA (US);
Milind Girkar, Sunnyvale, CA (US);
John P. Shen, San Jose, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods and apparatuses for compiler-created helper thread for multi-threading are described herein. In one embodiment, exemplary process includes identifying a region of a main thread that likely has one or more delinquent loads, the one or more delinquent loads representing loads which likely suffer cache misses during an execution of the main thread, analyzing the region for one or more helper threads with respect to the main thread, and generating code for the one or more helper threads, the one or more helper threads being speculatively executed in parallel with the main thread to perform one or more tasks for the region of the main thread. Other methods and apparatuses are also described.