The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2013

Filed:

May. 17, 2011
Applicants:

Takashi Kurusu, Yokohama, JP;

Takashi Izumida, Yokohama, JP;

Hiroyoshi Tanimoto, Yokohama, JP;

Nobutoshi Aoki, Yokohama, JP;

Inventors:

Takashi Kurusu, Yokohama, JP;

Takashi Izumida, Yokohama, JP;

Hiroyoshi Tanimoto, Yokohama, JP;

Nobutoshi Aoki, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/13 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a semiconductor device includes a substrate, and a plurality of interconnects provided in the same interconnect layer above the substrate. The device further includes a plurality of insulators provided so as to be buried between the plurality of interconnects. Moreover, the plurality of interconnects include an interconnect group in which 2or more interconnects are successively arrayed so that correlation coefficients of line edge roughness (LER) between both side surfaces of the respective interconnects are positive, where N is an integer of 4 or more.


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