The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2013

Filed:

May. 21, 2012
Applicants:

Tung-chieh Chen, Taipei, TW;

Hung-ming Chen, Jhubei, TW;

Yi-peng Weng, Taipei, TW;

Inventors:

Tung-Chieh Chen, Taipei, TW;

Hung-Ming Chen, Jhubei, TW;

Yi-Peng Weng, Taipei, TW;

Assignees:

Synopsys Taiwan Co., Ltd., Taipei, TW;

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fast analog layout migration from an original layout is disclosed. Various placement constraints, including topology, matching and symmetry are extracted from the schematic or netlist as well as the original layout. In addition, relative placement patterns are extracted from the original layout for matching and symmetry constraints. A constraint hierarchy tree can be built according to the constraints, and relative placement patterns are attached accordingly. By using the constraint hierarchy tree, multiple new placement results are efficiently explored that preserve the relative placement patterns for matching and symmetry constraints.


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