The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2013
Filed:
Sep. 22, 2011
Edward C. Cooney, Iii, Jericho, VT (US);
Jeffrey P. Gambino, Westford, VT (US);
Zhong-xiang He, Essex Junction, VT (US);
Xiao HU Liu, Briarcliff Manor, NY (US);
Thomas L. Mcdevitt, Underhill, VT (US);
Gary L. Milo, Williston, VT (US);
William J. Murphy, North Ferrisburgh, VT (US);
Edward C. Cooney, III, Jericho, VT (US);
Jeffrey P. Gambino, Westford, VT (US);
Zhong-Xiang He, Essex Junction, VT (US);
Xiao Hu Liu, Briarcliff Manor, NY (US);
Thomas L. McDevitt, Underhill, VT (US);
Gary L. Milo, Williston, VT (US);
William J. Murphy, North Ferrisburgh, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor device and a method of fabricating the same, includes vertically stacked layers on an insulator. Each of the layers includes a first dielectric insulator portion, a first metal conductor embedded within the first dielectric insulator portion, a first nitride cap covering the first metal conductor, a second dielectric insulator portion, a second metal conductor embedded within the second dielectric insulator portion, and a second nitride cap covering the second metal conductor. The first and second metal conductors form first vertically stacked conductor layers and second vertically stacked conductor layers. The first vertically stacked conductor layers are proximate the second vertically stacked conductor layers, and at least one air gap is positioned between the first vertically stacked conductor layers and the second vertically stacked conductor layers. An upper semiconductor layer covers the first vertically stacked conductor layers, the air gap and the second plurality of vertically stacked conductor layers.