The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2013

Filed:

Feb. 10, 2010
Applicants:

Feng Yan, Jiangsu, CN;

Rong Zhang, Jiangsu, CN;

Yi Shi, Jiangsu, CN;

Lin Pu, Jiangsu, CN;

Yue Xu, Jiangsu, CN;

Fuwei Wu, Jiangsu, CN;

Xiaofeng BO, Jiangsu, CN;

Haoguang Xia, Jiangsu, CN;

Inventors:

Feng Yan, Jiangsu, CN;

Rong Zhang, Jiangsu, CN;

Yi Shi, Jiangsu, CN;

Lin Pu, Jiangsu, CN;

Yue Xu, Jiangsu, CN;

Fuwei Wu, Jiangsu, CN;

Xiaofeng Bo, Jiangsu, CN;

Haoguang Xia, Jiangsu, CN;

Assignees:

Nanjing University, Nanjing, Jiangsu, CN;

Other;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a photosensitive detector with a composite dielectric gate MOSFET structure and its signal readout method. The MOSFET structure detector is formed on a p-type semiconductor substrate. N-type semiconductor regions locate on the two sides of the top part of the p-type semiconductor substrate to form a source and a drain. An underlying dielectric layer, a photo-electron storage layer, a top dielectric layer, and a control gate are stacked on the substrate in sequence. The top insulating dielectric layer can prevent the photoelectrons stored in the photo-electron storage layer from leaking into the control gate. The source and the drain are floating when photoelectrons are collected and injected into the photoelectron storing layer to be held therein. There is a transparent or semi-transparent window for detecting incident light forming on the substrate or gate surface. This invented detector has excellent scalability, basic compatibility with the flash memory fabricating technology, low leakage current, higher imaging speed than CCD, non-sensitivity to processing defects, larger dynamic range than other structures and higher accuracy of signal readout.


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