The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2013
Filed:
Mar. 02, 2011
Yue-ming Hsin, Tainan, TW;
Fang-ping Chou, New Taipei, TW;
Ching-wen Wang, Changhua County, TW;
Guan-yu Chen, Taichung, TW;
Yue-Ming Hsin, Tainan, TW;
Fang-Ping Chou, New Taipei, TW;
Ching-Wen Wang, Changhua County, TW;
Guan-Yu Chen, Taichung, TW;
National Central University, Taoyuan, TW;
Abstract
A silicon photodiode with symmetry layout and deep well bias in CMOS technology is provided. The silicon photodiode includes a substrate, a deep well, and a PN diode structure. The deep well is disposed on the substrate, where an extra bias is applied to the deep well. The region surrounded by the deep well forms the main body of the silicon photodiode. The PN diode structure is located in the region surrounded by the deep well, where the silicon photodiode has a symmetry layout. The deep well is adopted when fabricating the silicon photodiode, and the extra bias is applied to the deep well to eliminate the interference and effect of the substrate absorbing light, and further greatly improve speed and bandwidth. Furthermore, the silicon photodiode has a symmetry layout, so that uniform electric field distribution is achieved, and the interference of the substrate noise is also reduced.