The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2013
Filed:
Apr. 20, 2011
Heung Jin Joo, Suwon-si, KR;
Jaehee OH, Seongnam-si, KR;
Byoungjae Bae, Hwaseong-si, KR;
Myung Jin Kang, Suwon-si, KR;
Heung Jin Joo, Suwon-si, KR;
JaeHee Oh, Seongnam-si, KR;
Byoungjae Bae, Hwaseong-si, KR;
Myung Jin Kang, Suwon-si, KR;
Abstract
Methods of forming a variable-resistance memory device include patterning an interlayer dielectric layer to define an opening therein that exposes a bottom electrode of a variable-resistance memory cell, on a memory cell region of a substrate (e.g., semiconductor substrate). These methods further include depositing a layer of variable-resistance material (e.g., phase-changeable material) onto the exposed bottom electrode in the opening and onto a first portion of the interlayer dielectric layer extending opposite a peripheral circuit region of the substrate. The layer of variable-resistance material and the first portion of the interlayer dielectric layer are then selectively etched in sequence to define a recess in the interlayer dielectric layer. The layer of variable-resistance material and the interlayer dielectric layer are then planarized to define a variable-resistance pattern within the opening.