The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2013
Filed:
Jun. 24, 2011
Jung Ho Kim, Suwon-si, KR;
Daehyun Jang, Seongnam-si, KR;
Myoungbum Lee, Seoul, KR;
Kihyun Hwang, Seongnam-si, KR;
Sangryol Yang, Hwaseong-si, KR;
Yong-hoon Son, Yongin-si, KR;
Ju-eun Kim, Seoul, KR;
Sunghae Lee, Suwon-si, KR;
Dongwoo Kim, Incheon, KR;
Jingyun Kim, Yongin-si, KR;
Jung Ho Kim, Suwon-si, KR;
Daehyun Jang, Seongnam-si, KR;
Myoungbum Lee, Seoul, KR;
Kihyun Hwang, Seongnam-si, KR;
Sangryol Yang, Hwaseong-si, KR;
Yong-Hoon Son, Yongin-si, KR;
Ju-Eun Kim, Seoul, KR;
Sunghae Lee, Suwon-si, KR;
Dongwoo Kim, Incheon, KR;
JinGyun Kim, Yongin-si, KR;
Abstract
Semiconductor devices and methods of forming the same may be provided. The semiconductor devices may include gate patterns and insulation patterns repeatedly and alternatingly stacked on a substrate. The semiconductor devices may also include a through region penetrating the gate patterns and the insulation patterns. The semiconductor devices may further include a channel structure extending from the substrate through the through region. The channel structure may include a first channel pattern having a first shape. The first channel pattern may include a first semiconductor region on a sidewall of a portion of the through region, and a buried pattern dividing the first semiconductor region. The channel structure may also include a second channel pattern having a second shape. The second channel pattern may include a second semiconductor region in the through region. A grain size of the second semiconductor region may be larger than that of the first semiconductor region.