The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2013
Filed:
Feb. 14, 2011
Masahiko Suzuki, Osaka, JP;
Yoshimasa Chikama, Osaka, JP;
Yoshifumi Ohta, Osaka, JP;
Tokuo Yoshida, Osaka, JP;
Okifumi Nakagawa, Osaka, JP;
Yoshiyuki Harumoto, Osaka, JP;
Yoshinobu Miyamoto, Osaka, JP;
Tetsuya Yamashita, Osaka, JP;
Hinae Mizuno, Yamato, JP;
Masahiko Suzuki, Osaka, JP;
Yoshimasa Chikama, Osaka, JP;
Yuuji Mizuno, Osaka, JP;
Yoshifumi Ohta, Osaka, JP;
Tokuo Yoshida, Osaka, JP;
Okifumi Nakagawa, Osaka, JP;
Yoshiyuki Harumoto, Osaka, JP;
Yoshinobu Miyamoto, Osaka, JP;
Tetsuya Yamashita, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
An active matrix substrate () includes a plurality of pixel electrodes () arranged in a matrix, and a plurality of TFTs () each connected to a corresponding one of the pixel electrodes (), and each including a gate electrode () provided on an insulating substrate (), a gate insulating film () covering the gate electrode (), a semiconductor layer () provided on the gate insulating film () and having a channel region (C) overlapping the gate electrode (), and a source electrode () and a drain electrode () of copper or copper alloy provided on the gate insulating film () and separated from each other by the channel region (C) of the semiconductor layer (). The semiconductor layer () is formed of an oxide semiconductor and covers the source electrode () and the drain electrode ().